/* SME Extension (LD1x instructions).  */
ld1b {za0h.b[w12, 0]}, p0/z, [x0]
ld1b {za0h.b[w12, 0]}, p0/z, [sp]
ld1b {za0h.b[w12, 0]}, p0/z, [sp, x0]
ld1b {za0h.b[w15, 15]}, p7/z, [x17]
ld1b {za0h.b[w15, 15]}, p7/z, [sp]
ld1b {za0h.b[w15, 15]}, p7/z, [sp, x17]

ld1h {za0h.h[w12, 0]}, p0/z, [x0]
ld1h {za0h.h[w12, 0]}, p0/z, [sp]
ld1h {za0h.h[w12, 0]}, p0/z, [x0, x0, lsl #1]
ld1h {za0h.h[w12, 0]}, p0/z, [sp, x0, lsl #1]
ld1h {za1h.h[w15, 7]}, p7/z, [x17]
ld1h {za1h.h[w15, 7]}, p7/z, [sp]
ld1h {za1h.h[w15, 7]}, p7/z, [x0, x17, lsl #1]
ld1h {za1h.h[w15, 7]}, p7/z, [sp, x17, lsl #1]

ld1w {za0h.s[w12, 0]}, p0/z, [x0]
ld1w {za0h.s[w12, 0]}, p0/z, [sp]
ld1w {za0h.s[w12, 0]}, p0/z, [x0, x0, lsl #2]
ld1w {za0h.s[w12, 0]}, p0/z, [sp, x0, lsl #2]
ld1w {za3h.s[w15, 3]}, p7/z, [x17]
ld1w {za3h.s[w15, 3]}, p7/z, [sp]
ld1w {za3h.s[w15, 3]}, p7/z, [x0, x17, lsl #2]
ld1w {za3h.s[w15, 3]}, p7/z, [sp, x17, lsl #2]

ld1d {za0h.d[w12, 0]}, p0/z, [x0]
ld1d {za0h.d[w12, 0]}, p0/z, [sp]
ld1d {za0h.d[w12, 0]}, p0/z, [x0, x0, lsl #3]
ld1d {za0h.d[w12, 0]}, p0/z, [sp, x0, lsl #3]
ld1d {za7h.d[w15, 1]}, p7/z, [x17]
ld1d {za7h.d[w15, 1]}, p7/z, [sp]
ld1d {za7h.d[w15, 1]}, p7/z, [x0, x17, lsl #3]
ld1d {za7h.d[w15, 1]}, p7/z, [sp, x17, lsl #3]

ld1q {za0h.q[w12, 0]}, p0/z, [x0]
ld1q {za0h.q[w12, 0]}, p0/z, [sp]
ld1q {za0h.q[w12, 0]}, p0/z, [x0, x0, lsl #4]
ld1q {za0h.q[w12, 0]}, p0/z, [sp, x0, lsl #4]
ld1q {za15h.q[w15, 0]}, p7/z, [x17]
ld1q {za15h.q[w15, 0]}, p7/z, [sp]
ld1q {za15h.q[w15, 0]}, p7/z, [x0, x17, lsl #4]
ld1q {za15h.q[w15, 0]}, p7/z, [sp, x17, lsl #4]

ld1b {za0v.b[w12, 0]}, p0/z, [x0]
ld1b {za0v.b[w12, 0]}, p0/z, [sp]
ld1b {za0v.b[w12, 0]}, p0/z, [sp, x0]
ld1b {za0v.b[w15, 15]}, p7/z, [x17]
ld1b {za0v.b[w15, 15]}, p7/z, [sp]
ld1b {za0v.b[w15, 15]}, p7/z, [sp, x17]

ld1h {za0v.h[w12, 0]}, p0/z, [x0]
ld1h {za0v.h[w12, 0]}, p0/z, [sp]
ld1h {za0v.h[w12, 0]}, p0/z, [x0, x0, lsl #1]
ld1h {za0v.h[w12, 0]}, p0/z, [sp, x0, lsl #1]
ld1h {za1v.h[w15, 7]}, p7/z, [x17]
ld1h {za1v.h[w15, 7]}, p7/z, [sp]
ld1h {za1v.h[w15, 7]}, p7/z, [x0, x17, lsl #1]
ld1h {za1v.h[w15, 7]}, p7/z, [sp, x17, lsl #1]

ld1w {za0v.s[w12, 0]}, p0/z, [x0]
ld1w {za0v.s[w12, 0]}, p0/z, [sp]
ld1w {za0v.s[w12, 0]}, p0/z, [x0, x0, lsl #2]
ld1w {za0v.s[w12, 0]}, p0/z, [sp, x0, lsl #2]
ld1w {za3v.s[w15, 3]}, p7/z, [x17]
ld1w {za3v.s[w15, 3]}, p7/z, [sp]
ld1w {za3v.s[w15, 3]}, p7/z, [x0, x17, lsl #2]
ld1w {za3v.s[w15, 3]}, p7/z, [sp, x17, lsl #2]

ld1d {za0v.d[w12, 0]}, p0/z, [x0]
ld1d {za0v.d[w12, 0]}, p0/z, [sp]
ld1d {za0v.d[w12, 0]}, p0/z, [x0, x0, lsl #3]
ld1d {za0v.d[w12, 0]}, p0/z, [sp, x0, lsl #3]
ld1d {za7v.d[w15, 1]}, p7/z, [x17]
ld1d {za7v.d[w15, 1]}, p7/z, [sp]
ld1d {za7v.d[w15, 1]}, p7/z, [x0, x17, lsl #3]
ld1d {za7v.d[w15, 1]}, p7/z, [sp, x17, lsl #3]

ld1q {za0v.q[w12, 0]}, p0/z, [x0]
ld1q {za0v.q[w12, 0]}, p0/z, [sp]
ld1q {za0v.q[w12, 0]}, p0/z, [x0, x0, lsl #4]
ld1q {za0v.q[w12, 0]}, p0/z, [sp, x0, lsl #4]
ld1q {za15v.q[w15, 0]}, p7/z, [x17]
ld1q {za15v.q[w15, 0]}, p7/z, [sp]
ld1q {za15v.q[w15, 0]}, p7/z, [x0, x17, lsl #4]
ld1q {za15v.q[w15, 0]}, p7/z, [sp, x17, lsl #4]

/* Register aliases.  */
foo .req za0v
bar .req w15

ld1q {foo.q[w12, #0]}, p0/z, [sp, x0, lsl #4]
ld1q {za15v.q[bar, #0]}, p7/z, [x17]

/* Optional LSL operator.  */
ld1b {za0v.b[w15, 15]}, p7/z, [sp, x0, lsl #0]
ld1b {za0h.b[w12, 0]}, p0/z, [x0, x1]
ld1h {za0h.h[w12, 0]}, p0/z, [x0, x1]
ld1w {za3v.s[w12, 3]}, p7/z, [x0, x1]
ld1d {za0h.d[w12, 0]}, p0/z, [x0, x1]
ld1q {za0v.q[w12, 0]}, p0/z, [x0, x1]
